|
|
This circuit uses a 741 op amp to form a constant volume or constant amplitude amplifier. The operational amplifier is configured as an AC amplifier with its gain controlled by the ratio of the values of resistor R1 with respect to R2 and by the AC voltage divider formed by R4 in series with the internal impedance of Q1. The FET functions as a voltage controlled resistor. Its control voltage is obtained from the output of the op amp with a network formed by diode D1 in series with resistor R5 and resistor R6 in parallel with capacitor C3. When a small signal is applied to the 741, its output is small. Consequently, very little negative bias is developed on the FET gate from the network consisting of D1, R5, R6 and C3. The FET functions as a resistance with a value of several hundred ohms. The voltage divider formed from R4 and Q1 causes slight negative feedback that is applied to the 741, so it provides high voltage gain. By contrast, if a large signal is applied to the 741, its output is large, so a large negative bias is developed on the gate of FET Q1 from the D1, R5, C3 network. As a result, Q1 acts like a very high resistance. In this condition, the R4/Q1 divider applies large negative feedback to the 741 and it provides a low voltage gain. The overall effect of this is that the mean level of the output signal is self-regulated at 1.5 to 2.85 voltes over a 50:1 range of input signal level. It does this without generating audible signal distortion. R1 determines the sensitivity. It is selected to accommodate the maximum input signal. It should be 200k ohms per RMS volt of input signal. C3 determines the gain control time constant of the circuit.
|
|
